The present invention is related to the field of temperature protection circuits for transistors. The present invention is particularly useful for field effect transistors (FETS), and may also be usable for other transistors.
It is known that if an FET die exceeds some predetermined operating temperature while the FET is on, there is a substantial likelihood of failure of or damage to the FET. Thus, FETS have published specifications which indicate the maximum allowable operating junction temperature for the transistor. Failures are caused by exceeding the maximum allowable junction temperature, and failures also can occur because excessive short circuit current is passed through the die.
Some prior systems have provided overtemperature protection for the transistor by providing an additional temperature sensing element, comprising a diode or thermistor, as close as possible to the FET die to sense FET temperature. Then the FET is turned off when the sensed temperature exceeds some maximum threshold. In such prior systems, typically there may be poor thermal coupling between the temperature sensing element and the FET die so that the actual sensed temperature is not accurately representative of the actual FET temperature. Thus, circuit designers might have to provide an additional safety margin by insuring that the FET turns off even though the maximum actual FET die temperature may not yet have been reached. While this will save the FET device, it interrupts desired normal circuit operation prematurely. In addition, the providing of an additional temperature sensing element very close to the FET die complicates and increases the cost of the resultant mechanical structure which would now include the FET and the sensing element.
Other prior systems have attempted to monitor either FET voltage or FET through current and shut off the FET when these exceeded some predetermined threshold. However, these techniques do not accurately turn off the transistor in accordance with the actual FET die temperature since the FET drain to source voltage and through current are not only functions of the FET die temperature, but are also primary functions of the load connected to the FET. Some transistor foldback circuits receive signals related to both collector to emitter voltage and emitter current and reduce transistor power when both these signals together indicate excessive transistor power dissipation. However, such circuits do not effectively monitor actual die temperature and can prematurely interrupt normal transistor operation before the maximum allowable die temperature is reached.
While some prior systems which utilize an additional temperature sensing element may function fairly well in accurately sensing FET die temperature, these systems still increase the cost and complexity of the mechanical package of the combined FET and temperature sensing element. Without using an additional temperature sensing element, the prior art has not provided an accurate temperature protection circuit which shuts the FET off as a function of actual FET die temperature.